Design of a low-cost simple power supply
Abstract: with the new generation of set-top box and high-definition TV entering ordinary families, the sales price of such products will further decline. How to reduce the cost of such products is one of the important tasks of many development engineers. A simple low-cost power controller (sc2618) is introduced. This power controller has a good application in electronic products with 5V, 12V, and 24V input
key words: PWM controller sc2618; Low price; Design
Introduction
ac/dc switching power supply usually requires multiple groups of output isolation and a primary power controller to control the output voltage and current. Generally speaking, the output current of this multi group output power supply is relatively small, and the stable output voltage can be achieved through the linear regulator. Because the new generation of electronic products need low-cost and high-efficiency switching power supply that can provide large output current and low output voltage, this has prompted the adoption of decentralized power supply mode. In order to catch up with the rapid update pace of electronic products, product design engineers prefer to choose ac/dc adapters that are easy to purchase in the market, and install multiple groups of DC power supplies directly on the circuit board of the system. Since the voltage of the main chip of the system is getting lower and higher, and the traditional linear regulator can only be used for high voltage and low current, how to provide a series of DC switching power supply control chips with low price, simple circuit and complete performance has become one of the main tasks of many power chip manufacturers. Semtechinternational has launched a low-cost simple Synchronous Step-Down control chip (sc2618). This paper introduces a low-voltage and high-efficiency step-down power supply with less peripheral components
1 working principle
Figure 1 is a circuit diagram of on-board DC power supply often used in set-top boxes, LCD TVs and other electronic products. The input voltage of this kind of power supply is provided by ac/dc adapter, most of which are 12V or 5V, a few are 24V, and the output is 1.8V and 3.5A. Sc2618 shown in Figure 1 is a 6-pin SOT-23 small package chip, which can receive 4.5 ~ 14V working voltage and has an internal voltage of 1.25V. In addition, the mechanical impurity of hydraulic oil is mineral oil in the transportation reference, and the 0.5A FET drive can make the output current of the power supply reach 10A. Sc2618 does not need feedback compensation circuit
1.1 switching frequency calculation
it can be seen from Figure 1 that a group of voltage dividing resistors (R6, R8) feed back the output voltage information to the negative end of the sc2618 internal comparator (sc2618fb). The positive end of this comparator is connected to a 1.25V voltage reference (see Figure 2). If the output voltage is lower than the value set by the user, the high-end FET will be turned on until the output voltage rises above the set value. Similarly, if the output voltage is higher than the value set by the user, the high-end FET will be turned off and the low-end FET will be turned on until the output voltage drops below the set value
this chip mode will make a step-down power supply work in any of the following modes:
1) upper FET on 1 μ s;
2) lower FET on 1 μ s;
3) the upper/lower FET is connected 1 μ s。
because the minimum on time of sc2618 built-in upper/lower FET is 1 μ s. The switching frequency of the power supply can be inferred from Figure 3
an example of step-down power supply is used to explain the application of Figure 3. The input voltage of the dummy power supply is 12V, the output voltage is 1.8V, and the duty cycle of this power supply is 0.15 (1.8/12). It can be seen from Figure 3 that the switching frequency is 150kHz when the duty cycle is 0.15. If the input voltage of the power supply is 12V and the output voltage is 5V, the duty cycle of the power supply is about 0.42 and the switching frequency is 420khz
if the upper FET on time (ton) is less than the lower FET on time (toff), and the duty cycle (d) is less than 0.5, then the switching frequency is expressed by equation (1)
if the upper FET on time (ton) is greater than the lower FET on time (toff), and the duty cycle (d) is greater than 0.5, then the switching frequency is expressed by equation (2)
1.2 startup process
sc2618 startup process is like this: once the input voltage is connected to the sc2618 pin VCC, the upper FET drive (DH) and the lower FET drive (DL) do not generate signals until VCC exceeds the sc2618 input undervoltage protection point (generally 4.5V). The internal soft start current source of the chip starts to charge the internal soft start capacitor. At this time, DH is a low signal and DL is a high signal. When the soft start capacitor voltage inside the chip reaches a certain value, the upper FET and the lower FET begin to work alternately. The power output voltage will begin to rise slowly. The internal soft start time of sc2618 is generally 100 μ s。 If the voltage on pin VCC suddenly falls below the chip input undervoltage protection point during normal operation, the soft start capacitor inside the chip begins to discharge. When the voltage of the soft start capacitor inside the chip drops to a certain value, the conduction time of the upper and lower FET will slowly decrease until it is completely turned off
1.3 output short-circuit protection
output short-circuit protection is achieved by comparing the sc2618 feedback terminal voltage (VFB) with its 1.25V internal voltage reference voltage. During normal operation, if the voltage at the feedback terminal is less than the reference voltage of 200mV, sc2618 immediately turns off the upper FET and the internal soft start capacitor begins to discharge. If the output short circuit occurs during the soft start process, the FET must be completely turned off and the soft start capacitor discharge can be started only after the soft start is completed. Once the soft start capacitor discharge ends, a new round of soft start starts again. Throughout the protection process, the voltage at the feedback terminal of sc2618 is less than the reference voltage of 200mV the FET is turned off the soft start capacitor is discharged the soft start capacitor is charged the FET is turned on
2 calculation of power components
since sc2618 does not need feedback compensation circuit, the parameters required for the design of the whole power supply only include output inductance, output capacitance, feedback voltage divider resistance, input capacitance and FET
2.1 output inductance
the selection/design of output inductance is based on the requirements of output DC and transient. Large inductance can reduce the output ripple current and voltage, but the response becomes slow in the process of load transients. Small inductance can get low DC copper loss, but AC core loss and AC winding resistance loss will become larger. The compromise method is to choose the peak to peak value of inductance ripple current as 20% - 30% of the rated output current
assuming that the inductance ripple current (peak to peak) is 20% of the load DC current, the output inductance is calculated by equation (3)
fosc=150khz, then l=14.5 μ H。 You can choose 15 that are easy to purchase in the market μ H/5a surface and less environmental pollution, mount inductor
2.2 output capacitance
output capacitance is selected according to the requirements of output voltage ripple and load dynamic change. The ripple current generated by the output inductor generates an output voltage ripple (vripple) on the equivalent series resistance (ESR) of the output capacitor. In order to meet the output voltage ripple requirements, the ESR of the output capacitor must meet equation (4)
fosc=150khz, vripple=60mv, and the calculated ESR is 90m Ω
the ESR of the output capacitor will produce a voltage change value (VT) when the output load current changes. In order to meet the requirements of the output voltage change value, the ESR of the output capacitor must also meet equation (5)
take Figure 1 as an example, if the dynamic change value of output voltage is 10% of the output voltage value (vt=10% × 1.8=180mv), if the load current change value is 1a, the required output capacitance ESR is 180m Ω. In order to meet the output voltage ripple and dynamic change at the same time, the capacitance with the minimum ESR should be selected. Therefore, 90m Ω/1000 is selected in this example μ F electrolytic capacitor
2.3 feedback voltage dividing resistance
the feedback voltage dividing resistance at the upper end can be selected between 5 ~ 15K Ω. The resistance value at the lower end can be calculated by equation (6)
in equation (6), 1.25V is sc2618 internal voltage reference. Taking Figure 1 as an example, if rtop=10k Ω, in order to obtain 1.8V output voltage, rbot=22.7k Ω. Finally, the RBOT is adjusted to 22.1k Ω by experiment. Generally speaking, rtop and RBOT should use 1% precision resistor
2.4 input capacitance
when the output is fully loaded, the ripple voltage generated by the ESR of the input capacitance at the power input is
, where: δ Is the ratio of ripple current on inductance to load current
in Figure 1 δ= 20%。 If the input end of the power supply can receive a ripple voltage of 500mv, the calculated ESR of the input capacitance is 130m Ω. For simplicity, you can choose the same 1000 μ F. 90m Ω electrolytic capacitor
2.5 power FET
for Synchronous Buck Converters with high input voltage and low output voltage, the upper FET turns on for a short time. The lower FET turns on for a long time, but the conversion voltage of the lower FET is almost zero. In such applications, the FET with smaller grid capacitance (larger internal resistance) is suitable for the upper switch, and the FET with larger grid capacitance (smaller internal resistance) is suitable for the lower switch. The FET used in this example is through its internal resistance (RDSON), gate capacitance/charge, and package thermal resistance( θ Ja) these three parameters. Using the sc26180.5a built-in driver, a FET with a gate charge of 25nc will produce a switching rise/fall time of about 50ns (ts=25nc/0.5a). TS will generate switching loss (PS) when the upper FET is switched. As shown in formula (8),
in Figure 1, PS is 0.3w
since there is no overlapping conduction between the upper and lower FET, the parasitic diode or external Schottky diode of the drain and source of the lower FET always turns on before the lower FET turns on. The conduction voltage of the lower FET is only the voltage of a diode between the drain and the source. The switching loss of the lower FET is zero. The losses of the upper and lower FET during conduction can be calculated by equations (9) and (10)
take Figure 1 as an example, the selected FET is ao4812. The internal resistance of the upper and lower ends of ao4812 is 28m Ω, and the upper and lower end conduction loss is 0.35w under 3.5A load. The loss of the whole aos4812 is 0.65w (ploss=0.3w + 0.35w). The junction temperature of the FET can be calculated by equation (11)
according to the ao4812 manual, its maximum junction temperature to room temperature thermal resistance is 110 ℃/w( θ Ja), the loss of aos4812 is 0.65w under 3.5A load, and the junction temperature of ao4812soic8 package is 111.5 ℃ at room temperature of 40 ℃. This value is far less than the junction temperature limit of the chip at 150 ℃
for applications with high current output (>3.5a), a low internal impedance FET can be used to limit its conduction loss, and its junction temperature can be controlled within 110 ℃ by using an external radiator
3 experimental results
for a single input power supply, sc2618 requires a low value capacitor (0.1 μ F~1 μ F. 25V) and a small signal diode (1N4148) to raise the voltage on the BST pin above the input voltage as the driving voltage of the upper n-channel FET. Foot VCC usually uses a 1 μ F/25v bypass ceramic chip capacitor. In addition, a low value resistor (2 ~ 10 Ω) needs to be added between the input and the pin VCC to eliminate the noise on the pin VCC
Table 1 shows the efficiency of 12v/(1.8v/3.5a) power supply under different load currents. Table 2 shows the efficiency of the same power supply at 5V input voltage. It can be seen that the efficiency of this circuit can be maintained at 85% - 90% in the application of 1.8V output voltage. If the same power supply uses asynchronous chips, the efficiency will be much lower
Figure 4 shows the waveform of 12v/(1.8v/3.5a) power supply under no-load. The top waveform is 1.8V output voltage ripple, and the measured ripple value is 53mV, which is very close to the 60mV value calculated above. Intermediate waveform
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